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薄膜トランジスタおよびその製造方法ならびに液晶表示装置
专利权人:
三菱電機株式会社
发明人:
村上 隆昭,中川 直紀,井上 和式,小田 耕治
申请号:
JP20130176951
公开号:
JP6131781(B2)
申请日:
2013.08.28
申请国别(地区):
日本
年份:
2017
代理人:
摘要:
PROBLEM TO BE SOLVED: To provide a thin film transistor capable of reducing an influence of a resistance component, a defect level, and a surface level of a barrier layer to a source-drain current in the thin film transistor in which a well type potential is formed on a semiconductor layer.SOLUTION: The thin film transistor of the present invention includes: a substrate; a gate electrode; a gate insulation film; an oxide semiconductor layer having a well type potential structure configured by laminating a first barrier layer, a well layer, and a second barrier layer in this order; and a source electrode and a drain electrode electrically connected to the oxide semiconductor layer. Because a contact area of the oxide semiconductor layer and the source electrode or drain electrode is maximum in the well layer of the first barrier layer, the well layer, and the second barrier layer, it is possible to inject and take out carries without passing through the barrier layer. As a result, an influence of the resistanc
来源网站:
中国工程科技知识中心
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