JANG Tae-Su,PARK Jin-Chul,PARK Ji-Hwan,JANG Il-Sik,RYU Seong-Wan,KWON Se-In,SHIN Jung-Ho,HAM Dae-Jin
申请号：
US201715713798
公开号：
US2018174845(A1)
申请日:
2017.09.25
申请国别(地区):
美国
年份:
2018
代理人:
摘要：
A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.
