您的位置: 首页 > 农业专利 > 详情页

CONFIGURATION OF DEFAULT VOLTAGE LEVEL FOR DUAL-VOLTAGE INPUT/OUTPUT PAD CELL VIA VOLTAGE RAIL RAMP UP TIMING
专利权人:
Freescale Semiconductor, Inc.
发明人:
Sato Haku,Greenwood Robert,Herbst Paul M.
申请号:
US201615269475
公开号:
US2018081412(A1)
申请日:
2016.09.19
申请国别(地区):
美国
年份:
2018
代理人:
摘要:
An integrated circuit (IC) package of an electronic device includes a first input coupled to a first voltage rail and a second input coupled to a second voltage rail. The IC package further includes a set of one or more input/output (IO) pad cells and a power sequence detector coupled to the first and second voltage rails. The power sequence detector monitors the first and second voltage rails and configures the set of one or more IO pad cells to operate at one of a non-zero first voltage level or a non-zero second voltage level depending on which of the first voltage rail and the second voltage rail ramps up to a corresponding specified voltage level first.
来源网站:
中国工程科技知识中心
来源网址:
http://www.ckcest.cn/home/

意 见 箱

匿名:登录

个人用户登录

找回密码

第三方账号登录

忘记密码

个人用户注册

必须为有效邮箱
6~16位数字与字母组合
6~16位数字与字母组合
请输入正确的手机号码

信息补充