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Biased impedance circuit, impedance adjustment circuit, and associated signal generator
专利权人:
MEDIATEK INC.
发明人:
Chang Keng-Meng,Wang Yao-Chi
申请号:
US201715498525
公开号:
US9906209(B2)
申请日:
2017.04.27
申请国别(地区):
美国
年份:
2018
代理人:
McClure, Qualey & Rodack, LLP
摘要:
A biased impedance circuit, an impedance adjustment circuit, and an associated signal generator are provided. The biased impedance circuit is coupled to a summation node and applies a biased impedance to the summation node. A periodic input signal is received at the summation node. The biased impedance circuit includes a switching circuit for receiving an output window signal, wherein a period of the output window signal is shorter than a period of the periodic input signal. The switching circuit includes a low impedance path and a high impedance path. The low impedance sets the biased impedance to a first impedance when the output window signal is at a first voltage level. The high impedance path sets the biased impedance to a second impedance when the output window signal is at a second voltage level. The first impedance is less than the second impedance.
来源网站:
中国工程科技知识中心
来源网址:
http://www.ckcest.cn/home/

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