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Relaxation Oscillator Circuit for Low Frequency and Low Power Dissipation
专利权人:
Disruptive Technologies Research AS
发明人:
Hernes Bjørnar
申请号:
US201715400588
公开号:
US2017194944(A1)
申请日:
2017.01.06
申请国别(地区):
美国
年份:
2017
代理人:
摘要:
A relaxation oscillator circuit includes a current mirror configured to receive the input current from the and generate a plurality of starved currents, a Schmitt trigger configured to be current starved by a first starved current of the plurality of starved currents and a plurality of inverters configured to receive a Schmitt trigger output signal and generate an output clock signal, the inverters including a plurality of current starved inverters that are current starved by a second starved current of the plurality of starved currents, the plurality of current starved inverters receiving the Schmitt trigger output signal and generating a first inverter output signal, upon which an output clock signal is based. The relaxation includes a capacitor configured to charge or discharge in response to the output clock signal and a switching module configured to provide current from the current source based on the output clock signal.
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