INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE;CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
发明人:
HSU, JE-JUNG,CHEN, HSING-HAI
申请号：
US19890300582
公开号：
US4937756(A)
申请日:
1989.01.23
申请国别(地区):
美国
年份:
1990
代理人:
摘要：
The invention relates to a radiation-hardened (R-H) bulk CMOS process which is compatible with DRAM production and a specific gated isolation structure (GIS). The GIS structure consists of a novel oxide-silicon nitride-oxynitride gate insulator and a LPCVD polysilicon gate. A simple but automatically generating process for creating GIS directly from an original non-R-H device is also described. This generating process is fast and can revise any commercial products to a R-H version. The GIS is always shunted to Vss potential of the circuit chip to assure R-H capability. The grounded GIS structure replaces conventional LOCOS field oxide, which suffers from large threshold voltage shift when exposed to irradiation. Radiation resistance of this gated isolation structure (GIS) is suitable for application in radiation-immunity VLSI integrated circuits (
