Simultaneous formation of a top oxide layer in a silicon-oxide-nitride-oxide-silicon (SONOS) transistor and a gate oxide in a metal oxide semiconductor (MOS)
A semiconductor chip includes a base of a memory transistor in a first region of a substrate, and a base of a metal oxide semiconductor (MOS) transistor in a second region of the substrate. The base of the memory transistor includes a channel in a surface of substrate, a tunnel layer over the channel, and a nitride layer over the tunnel layer. The base of the MOS transistor includes a channel in the surface of substrate. The MOS transistor is coupled to the memory transistor through a shared diffusion region formed in the surface of substrate between the channel of the MOS transistor and the channel of the memory transistor. A plasma oxide overlying the nitride layer and the surface of the substrate to form a top oxide layer over the nitride layer and a gate oxide layer over the surface of substrate in the second region.
