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VERIFICATION METHOD OF CLEARANCE DESIGN
专利权人:
Inventec (Pudong) Technology Corporation ;INVENTEC CORPORATION
发明人:
CHEN Cheng-Hsin,LIN Chun-Hung
申请号:
US201615080535
公开号:
US2017147714(A1)
申请日:
2016.03.24
申请国别(地区):
美国
年份:
2017
代理人:
摘要:
A verification method is disclosed. A first entity pattern and a second entity pattern are provided, and a clearance exists between the first entity pattern and the second entity pattern. A third entity pattern is provided by starting from the first entity pattern and moving toward the second entity pattern according to a predetermined clearance value. By determining whether a partial overlap happens between the third entity pattern and the second entity pattern or not by interference inspection to verify whether the size of the clearance is within a safe range of a clearance design or not.
来源网站:
中国工程科技知识中心
来源网址:
http://www.ckcest.cn/home/

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