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Equivalence checking between two or more circuit designs that include square root circuits
专利权人:
SYNOPSYS, INC.
发明人:
Jain Himanshu,Pixley Carl P.
申请号:
US201514860549
公开号:
US9870442(B2)
申请日:
2015.09.21
申请国别(地区):
美国
年份:
2018
代理人:
Park, Vaughan, Fleming & Dowler LLP `Sahasrabuddhe Laxman
摘要:
Methods and apparatuses are described for proving equivalence between two or more circuit designs that include one or more division circuits and/or one or more square-root circuits. Some embodiments analyze the circuit designs to determine an input relationship between the inputs of two division (or square-root) circuits. Next, the embodiments determine an output relationship between the outputs of two division (or square-root) circuits based on the input relationship. The embodiments then prove equivalence between the circuit designs by using the input and output relationships.
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