A test structure of a display panel is provided. The test structure is within a buffer display region which is between a display region and a non-display region of the display panel and includes a substrate, at least one signal line on the substrate, an insulation layer covering the signal line, a planar layer on the insulation layer, and an electrode layer on the planar layer. The planar layer has at least one opening exposing a portion of the insulation layer. The electrode layer has a display electrode portion on the planar layer, at least one test electrode portion connecting the insulation layer via the opening and electrically insulated from the signal line, and at least one ring-shaped trench surrounding the test electrode portion and exposing a portion of the planar layer. The display electrode portion surrounds the ring-shaped trench and is electrically insulated from the test electrode portion.
