A data frame generation circuit, includes: a frame generation unit configured to output a first data frame including client signals and a first signal count of the client signals included in the first data frame, the client signal being stored in the first data frame in accordance with a system clock; a storage unit configured to store a signal count range; a comparison unit configured to compare the first signal count to the signal count range; and a control unit configured to control a frequency of the system clock based on a comparison result, wherein, if the first signal count falls within the signal count range, the control unit changes the frequency of the system clock.
