Substrate components for packaging IC chips and electronic device packages are disclosed. A substrate component for packaging IC chips comprises: a glass core base with at least one conductive through via connecting a combination of metallization and dielectric structures on both an upper surface and a lower surface of the glass core base; and, tapered edges created at a peripheral region of the glass core base; wherein dielectric layers are disposed over the tapered edges at the peripheral region of the glass core base. In accordance with an embodiment of the invention, the dielectric layers have a substantial planar upper surface, a lower surface conformably interfaced with the tapered edges at peripheral region of the glass core base, and a steep cutting face with the tapered edges of the glass core base. Alternatively, the tapered edges at peripheral region of the glass core base are not covered by the dielectric layers, and an encapsulated material sealing the tapered edges at peripheral region of the gl
