The objective of the invention is to provide a phase synchronization circuit wherein even if the frequency of an input signal becomes unstable, the frequency can be stabilized. A phase synchronization circuit 12 that corrects an error between the frequency of an output signal LSraw of an oscillator and a predetermined target frequency is characterized by comprising: an ADC 121 that performs an A/D conversion of the output signal LSraw; a reference frequency output means 123 that outputs a reference frequency signal Sref; an error frequency detection means 122a that receives the A/D converted output signal LSraw and the reference frequency signal Sref and calculates an error between the frequency of the output signal LSraw and the target frequency; a correction signal generation means 122b that generates an error correction signal LSerr on the basis of the error; a DAC 124 that performs a D/A conversion of the error correction signal LSerr; and a multiplier 125 that multiplies the output signal LSraw by the D/
