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Full/reduced pin JTAG interface shadow protocol detection, command, address circuits
专利权人:
Texas Instruments Incorporated
发明人:
Whetsel Lee D.
申请号:
US201615159171
公开号:
US9645198(B2)
申请日:
2016.05.19
申请国别(地区):
美国
年份:
2017
代理人:
Bassuk Lawrence J.`Brill Charles A.`Cimino Frank D.
摘要:
The disclosure describes a process and apparatus for accessing devices on a substrate. The substrate may include only full pin JTAG devices (504), only reduced pin JTAG devices (506), or a mixture of both full pin and reduced pin JTAG devices. The access is accomplished using a single interface (502) between the substrate (408) and a JTAG controller (404). The access interface may be a wired interface or a wireless interface and may be used for JTAG based device testing, debugging, programming, or other type of JTAG based operation.
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