Disclosed herein is a bias generator circuit for generating a desired bias voltage or bias current using a simple configuration. The bias generator circuit includes a voltage generator circuit, a comparator, and a clock gating circuit. The voltage generator circuit increases or decreases its output voltage in accordance with the number of clock cycles of a given clock signal. The comparator compares the output voltage of the voltage generator circuit to a reference voltage. The clock gating circuit receives, as a control signal, output of the comparator and determines, in accordance with the control signal, whether or not to pass the clock signal to the voltage generator circuit. Thus, the output voltage of the voltage generator circuit, i.e., a bias voltage, is set to be close to the reference voltage.
