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Scan Chain Circuits In Non-Volatile Memory
专利权人:
SanDisk 3D LLC
发明人:
Wang Kesheng
申请号:
US201514919154
公开号:
US2017115342(A1)
申请日:
2015.10.21
申请国别(地区):
美国
年份:
2017
代理人:
摘要:
A bit scan circuit includes N scan blocks corresponding with an N-bit string of binary data. The string is scanned using an input clock signal to count the number of bits having a predetermined binary value. Each scan block includes a single latch to transfer the corresponding bit and to indicate reset. The scan blocks are organized into groups. Each group is enabled by a corresponding token signal. The token signal for each group is asserted after each preceding scan block indicates a pass value. When enabled by its token signal, the first scan block in a group is reset by a first clock signal. A second scan block in the group is enabled for reset after the first scan block indicates the pass value. The second scan block in the group is reset by a second clock signal having pulses that precede corresponding pulses from the first clock signal.
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