Switched capacitor circuit architectures that may enable high efficiency step-up or step-down dc-dc conversion from a primary, fixed supply input voltage using a four-switch switched capacitor topology and a separate auxiliary supply input voltage. The auxiliary supply input voltage can be optimized within the system or chosen from among other readily available supplies in the system to achieve the highest efficiency conversion ratio, without modifying the switch and flying capacitor arrangement. The auxiliary supply input voltage may be applied to other fixed conversion ratio converters to achieve higher efficiency conversion.
