BARRY, Brendan,CONNOR, Fergal,O'RIORDAN, Martin,MOLONEY, David,POWER, Sean
申请号：
EP20150801496
公开号：
EP3175355(A2)
申请日:
2015.07.27
申请国别(地区):
欧洲专利局
年份:
2017
代理人:
摘要：
A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.
