A sequential circuit includes a data input terminal, a data path, and a redundant feedback loop. The data input terminal receives input data. The data path is connected to the data input terminal and transmits the input data to a data output terminal based on a first clock signal and a second clock signal. The redundant feedback loop is connected to the first data path and stores first data based on at least one of the first or second clock signals when the first data is equal to second data. The first data corresponds to the input data. The second clock signal is a delayed signal of the first clock signal. The second data is delayed data of the first data.