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INTEGRATED CIRCUIT, AND DESIGN METHOD, DESIGN APPARATUS AND DESIGN PROGRAM FOR INTEGRATED CIRCUIT
专利权人:
NEC Corporation
发明人:
GOTOU Takashi
申请号:
US201715458247
公开号:
US2017271317(A1)
申请日:
2017.03.14
申请国别(地区):
美国
年份:
2017
代理人:
摘要:
Disclosed is an integrated circuit that enables the addition of larger amount of capacitance to the integrated circuit itself. The integrated circuit includes a default cell and a blank cell. When the default cell is arranged in an empty portion of the integrated circuit and a wiring of the arranged default cell is short circuited with a wiring of the integrated circuit, the blank cell is arranged instead of the arranged default cell, a wiring for coupling one terminal of the capacitance of the blank cell to the power supply terminal of the blank cell or a wiring for coupling another terminal of the capacitance of the blank cell to the ground terminal of the blank cell at the short circuited portion is arranged bypassing the wiring of the integrated circuit.
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中国工程科技知识中心
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