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Semiconductor circuit, voltage detection circuit, and voltage determination circuit
专利权人:
LAPIS SEMICONDUCTOR CO., LTD.
发明人:
Takemura Takashi
申请号:
US201514936167
公开号:
US9729137(B2)
申请日:
2015.11.09
申请国别(地区):
美国
年份:
2017
代理人:
Volentine & Whitt, PLLC
摘要:
The present disclosure provides a semiconductor circuit including: a PMOS transistor that includes a first source connected to a power supply, a first drain, and a first gate to which a fixed potential is supplied; an output circuit that outputs a first output signal, which is a reset signal or a power-on signal, and that outputs a second output signal according to a potential of the first drain; a constant current source connected to the first drain; and an NMOS transistor that includes a second source to which a fixed potential is supplied, a second drain connected to the first drain, and a second gate to which the second output signal from the output circuit is applied.
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