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Method and system for architecture of a fast programmable transport demultiplexer using a double buffered approach
专利权人:
BROADCOM CORPORATION
发明人:
Rodgers Stephane W.
申请号:
US201314035293
公开号:
US9578139(B2)
申请日:
2013.09.24
申请国别(地区):
美国
年份:
2017
代理人:
Foley & Lardner LLP
摘要:
A method and system are provided for architecture of a very fast programmable transport demultiplexer using a double-buffered approach. The method may involve utilizing a hardware assist block to process incoming packets, retrieve information about the packets, and write the retrieved information to a memory block. A firmware block may then utilize the information in memory to perform further processing on the packet data. The firmware and hardware assist blocks may work simultaneously so as to speed up the processing of the packet, which can comprise record data and/or audio/video data. The system may comprise the hardware assist block, the firmware assist block, and a memory block.
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中国工程科技知识中心
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http://www.ckcest.cn/home/

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