A comparator includes an input-stage circuit configured to operate in synchronization with a clock signal and to produce two voltages at two nodes, respectively, such that which one of the two voltages is greater than the other is responsive to which one of two input signals is greater than the other, a positive-feedback circuit configured to operate in synchronization with the clock signal and to produce, through positive feedback, two output signals responsive to which one of the two voltages at the two nodes is greater than the other, and an adjustment circuit coupled to the two nodes, and configured to change, in response to a setting value, speed at which voltages at the two nodes change.
