LEE Dongjin,KIM Junsoo,JEONG Moonyoung,YAMADA Satoru,WOO Dongsoo,KIM Jiyoung
申请号：
US201815868620
公开号：
US2018158918(A1)
申请日:
2018.01.11
申请国别(地区):
美国
年份:
2018
代理人:
摘要：
A semiconductor device may include a device isolation region configured to define an active region in a substrate, an active gate structure disposed in the active region, and a field gate structure disposed in the device isolation region. The field gate structure may include a gate conductive layer. The active gate structure may include an upper active gate structure including a gate conductive layer and a lower active gate structure formed under the upper active gate structure and vertically spaced apart from the upper active gate structure. The lower active gate structure may include a gate conductive layer. A top surface of the gate conductive layer of the field gate structure is located at a lower level than a bottom surface of the gate conductive layer of the upper active gate structure.
