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Resistance-change memory having on-state, off-state, and intermediate state
专利权人:
Kabushiki Kaisha Toshiba
发明人:
Ichihara Reika,Matsushita Daisuke,Fujii Shosuke
申请号:
US201514621071
公开号:
US9601192(B2)
申请日:
2015.02.12
申请国别(地区):
美国
年份:
2017
代理人:
Oblon, McClelland, Maier & Neustadt, L.L.P.
摘要:
According to one embodiment, a resistance-change memory includes a memory cell and a control circuit. The memory cell comprises first and second electrodes, and a variable resistance layer disposed between the first electrode and the second electrode. The control circuit applies a voltage between the first electrode and the second electrode to perform writing, erasing, and reading. During the writing, the control circuit applies a first voltage pulse between the first electrode and the second electrode, and then applies a second voltage pulse different in polarity from the first voltage pulse after applying the first voltage pulse.
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