Kim Jong Hee,Kim Hyun Joon,Shin Kyoung Ju,Ward Alexander,Lee Cheol-Gon,Chai Chong Chul
申请号：
US201414456926
公开号：
US9685948(B2)
申请日:
2014.08.11
申请国别(地区):
美国
年份:
2017
代理人:
Innovation Counsel LLP
摘要：
A stage includes a first transistor including an input terminal to which a clock signal is applied and a control terminal connected to a first node; a first capacitor including terminals respectively connected to the first node and an output terminal of the first transistor; a second transistor including an input terminal connected to the output terminal of the first transistor, a control terminal connected to a second node, and an output terminal to which a low voltage is applied; a third transistor including an output terminal connected to the second node, a control terminal connected to the first node, and an input terminal to which the low voltage is applied; and a fourth transistor including an input terminal connected to the first node and an output terminal to which the low voltage is applied, wherein the fourth transistor is switched according to an output signal of a next stage.
