Many-core processor architecture and many-core operating system comprising a plurality of homogeneous and/or heterogeneous clusters, wherein each of said clusters comprises a plurality of arithmetic cores, a local memory arranged to be accessed by each of said plurality of arithmetic cores, an input-output, IO, interface arranged for inter-connecting said plurality of clusters, and a control core which is arranged for locally scheduling of tasks over said arithmetic cores within a same cluster, and for controlling communication between said plurality of homogeneous and/or heterogeneous clusters via said IO interface.
