The present document discloses a correction circuit. The correction circuit includes a frequency dividing circuit (110), a frequency dividing coefficient operation circuit (120), a built-in temperature collection circuit (130), and a power-on and power-off detection circuit (140). The built-in temperature collection circuit (130) is configured to collect a temperature of the chip; the power-on and power-off detection circuit (140) is configured to detect power-on and power-off of the chip; the frequency dividing coefficient operation circuit (120) is configured to calculate, according to the temperature of the chip collected by the built-in temperature collection circuit (130) when the power-on and power-off detection circuit (140) detects that the chip is powered off, a frequency dividing coefficient, and output the frequency dividing coefficient to the frequency dividing circuit (110); and the frequency dividing circuit (110) is configured to provide, according to the frequency dividing coefficient output b
