An instruction processing method for a very long instruction word instruction set comprises: determining a destination instruction row of a discontinuous address instruction fetch operation (101); determining, according to a first preset rule, that instructions of the destination instruction row are stored in different rows of a memory (102); inserting at least one no-operation instruction into an instruction row in front of the destination instruction row according to a second preset rule (103); and storing the instructions of the destination instruction row at a same row of the memory (104). Also disclosed is an instruction processing apparatus (05) for a very long instruction word instruction set.