In an embodiment, a buffer circuit may includes a current source circuit, a self-bias generation circuit, a signal input circuit, and a first current sink circuit. The current source circuit may apply current to a first node and a second node in response to a self-bias voltage. The self-bias generation circuit may generate the self-bias voltage which has a voltage level between voltage levels of the first and second nodes. The signal input circuit may control the voltage levels of the first node and the second node in response to a first input signal and a second input signal. The first current sink circuit may control an amount of current flowing from the signal input circuit to a ground terminal in response to an enable signal and the self-bias voltage.
