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MOS P-N junction diode with enhanced response speed and manufacturing method thereof
专利权人:
PFC DEVICE HOLDINGS LTD
发明人:
Kuo Hung-Hsin,Chen Mei-Ling
申请号:
US201615141039
公开号:
US9595617(B2)
申请日:
2016.04.28
申请国别(地区):
美国
年份:
2017
代理人:
WPAT, PC `King Justin
摘要:
A MOS P-N junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a central conductive layer, a silicon nitride layer, a metal diffusion layer, a channel region, and a metal sputtering layer. For manufacturing the MOS P-N junction diode, a mask layer is formed on a semiconductor substrate. A gate oxide layer is formed on the semiconductor substrate, and a polysilicon structure is formed on the gate oxide layer. A guard ring, a central conductive layer and a channel region are formed in the semiconductor substrate. A silicon nitride layer is formed on the central conductive layer. A metal diffusion layer is formed within the guard ring and the central conductive layer. Afterwards, a metal sputtering layer is formed, and the mask layer is partially exposed.
来源网站:
中国工程科技知识中心
来源网址:
http://www.ckcest.cn/home/

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