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Common-Mode Impedance Network for Reducing Sensitivity in Oscillators
专利权人:
SILICON LABORATORIES INC.
发明人:
Caffee Aaron J.
申请号:
US201514970865
公开号:
US2017179881(A1)
申请日:
2015.12.16
申请国别(地区):
美国
年份:
2017
代理人:
摘要:
A low-complexity differential inductor and common-mode impedance network for reducing effects of flicker noise in an oscillator output signal have been disclosed. An oscillator includes a planar conductive loop comprising a first terminal, a second terminal, and a center tap. The planar conductive loop is formed from a first conductive layer above an integrated circuit substrate. The center tap is coupled to a first power supply node. The oscillator includes a planar conductive structure extending from a first point proximate to the center tap. The planar conductive structure extends along a line of symmetry of the planar conductive loop to a second point proximate to the first terminal and the second terminal. The planar conductive structure may be formed from the first conductive layer and may be directly coupled to the center tap.
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