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High voltage capacitor route with integrated failure point
专利权人:
William J. Linder
发明人:
William J. Linder,Ron A. Balczewski,Jacob M. Ludwig
申请号:
US12952554
公开号:
US08364259B2
申请日:
2010.11.23
申请国别(地区):
US
年份:
2013
代理人:
摘要:
An implantable medical device may have a circuit failure mode. The disclosed circuit may have an integrated failure point designed to fail prior to those portions of the circuit. The integrated failure point may include a narrowed portion of a high voltage lead and a grounded lead having a narrow gap separating the grounded lead from the narrowed portion of the high voltage lead. During a high stress fault condition the narrowed portion of the high voltage lead acts as a fuse, forming a vaporized cloud of metal, which shorts current in the high voltage lead across the narrow gap to the grounded lead, thus protecting the remaining portion of the circuit from the high stress condition.
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