A device including an array of superconducting logic cells, where each of the superconducting logic cells is configured to receive at least one input and provide at least one output, is provided. Each of the superconducting logic cells includes at least one Josephson junction, whose state changes based on at least a biasing condition caused by a phase of a first clock or a phase of a second clock. The array of the superconducting logic cells is configured to perform at least one operation based at least on a connection arrangement of the array of the superconducting logic cells.
