高信号レベル対応入出力回路

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专利权人:

クゥアルコム・インコーポレイテッドＱＵＡＬＣＯＭＭ ＩＮＣＯＲＰＯＲＡＴＥＤ

发明人:

ビジャイ・シャンカー,アブヒーク・グプタ,バイシュナブ・スリニバス,ビベク・モハン

申请号：

JP20150029810

公开号：

JP6058714(B2)

申请日:

2015.02.18

申请国别(地区):

日本

年份:

2017

代理人:

摘要：

A level shifter has at least one of either a pull up or a pull down circuit. The circuit is made of electronic components with reliability limits less than a maximum signal level output by the level shifter. The level shifter also has a timing circuit coupled to at least on of either the pull up or pull down circuit. The timing circuit controls a time of application of an input signal to at least one of either the pull up or pull down circuit preventing a terminal to terminal signal level experienced by the electronic components exceeding the reliability limits.

来源网站：

中国工程科技知识中心

来源网址：

http://www.ckcest.cn/home/