NORTHWESTERN UNIVERSITY;REGENTS OF THE UNIVERITY OF MINNESOTA
发明人:
Hersam Mark C.,Geier Michael L.,Prabhumirashi Pradyumna L.,Xu Weichao,Kim Hyungil
申请号：
US201414511705
公开号：
US9613879(B2)
申请日:
2014.10.10
申请国别(地区):
美国
年份:
2017
代理人:
Locke Lord LLP `Xia, Esq. Tim Tingkang
摘要：
In one embodiment, a complementary metal-oxide-semiconductor (CMOS) logic device formed with single-walled carbon nanotubes (SWCNTs) includes: at least one p-type metal-oxide-semiconductor (PMOS) thin-film transistor (TFT) formed with the SWCNTs, and at least one n-type metal-oxide-semiconductor (NMOS) TFT formed with the SWCNTs, where each of the at least one PMOS TFT and the at least one NMOS TFT has a gate, a source and a drain. The gate of each of the at least one PMOS TFT and the gate of each of the at least one NMOS TFT is configured to alternatively receive at least one input voltage, and respectively includes a local metallic gate structure formed of a metal. At least one of the drain of the at least one PMOS TFT and the drain of the at least one NMOS TFT is configured to output an output voltage VOUT.
