An ultrasonic transducer element chip includes a substrate, a plurality of ultrasonic transducer elements, a wiring part and an additional wiring part. The substrate defines a plurality of openings arranged in an array pattern. Each of the ultrasonic transducer elements is provided in each of the openings. The wiring part is connected to the ultrasonic transducer elements. The additional wiring part is disposed in a peripheral region between an outline of the array pattern of the openings and an outer edge of the substrate in a plan view as viewed along a thickness direction of the substrate. The additional wiring part is electrically insulated from the wiring part. The additional wiring part is longer than a shortest distance between the outline of the array pattern and the outer edge of the substrate in the plan view.
