Provided is a semiconductor device capable of reducing its area, operating at a high speed, or reducing its power consumption. A circuit 50 is used as a memory circuit with a function of performing an arithmetic operation. One of a circuit 80 and a circuit 90 has a region overlapping with at least part of the other of the circuit 80 and the circuit 90. Accordingly, the circuit 50 can perform the arithmetic operation that is essentially performed in the circuit 60； thus, a burden of the arithmetic operation on the circuit 60 can be reduced. Moreover, the number of times of data transmission and reception between the circuits 50 and 60 can be reduced. Furthermore, the circuit 50 functioning as a memory circuit can have a function of performing an arithmetic operation while the increase in the area of the circuit 50 is suppressed.本發明提供一種能夠實現面積縮小、高速工作或功耗降低的半導體裝置。在本發明中，作為具有運算功能的記憶體電路使用電路50。另外，電路80和電路90中的一個具有與其另一個的至少一部分重疊的區域。由此，可以在電路50中進行本來應該在電路60中進行的運算，從而減輕電路60中的運算的負擔。此外，可以減少在電路50與電路60之間進行的資料收發次數。另外，在抑制電路50的面積增加的同時還可以對用作記憶體電路的電路50附加運算功能。
