Disclosed is a multi-level inverter topology circuit. Three-level and five-level inverter topology circuits can still operate normally under the condition where an alternating-current output end of an inverter part is connected to the cathode of a direct-current power supply via an alternating-current grid. Thus, a direct-current power supply can always keep a potential to ground greater than or equal to zero, thereby effectively inhibiting a PID effect; moreover, a high-frequency leakage current of an inverter topology can be eliminated completely.
