The invention relates to a circuit (40) for impedance measurement comprising a switch matrix (43) connected to a chopper (46). The switch matrix (43) comprises a plurality of switches (S1 to S6) and is configured to receive an analogue signal (IN1, IN2). In operation, during a calibration period (PH1), the circuit (40) is configured to activate the chopper (46) and to control the switch matrix (43) in order to disconnect the received analog signal (IN1, IN2) from the chopper inputs (IN1', IN2') and to connect a voltage reference signal (VR) to the chopper inputs (IN1', IN2'). In operation, during a measurement period (PH2), the circuit (40) is configured to deactivate the chopper (46) and to control the switch matrix (43) in order to disconnect the voltage reference signal (VR) from the chopper inputs (IN1', IN2') and to connect the received analog signal (IN1, IN2) to the chopper inputs (IN1', IN2'). The invention also relates to a system and to a method for impedance measurement.
