Lee Chien-Hsin,Prabhu Manjunatha,Natarajan Mahadeva Iyer
申请号：
US201615134942
公开号：
US10115718(B2)
申请日:
2016.04.21
申请国别(地区):
美国
年份:
2018
代理人:
Williams Morgan, P.C.
摘要：
Methods, apparatus, and systems relating to a MOSFET with ESD resistance, specifically, to a semiconductor device comprising a field-effect transistor (FET) comprising a gate, a source, and a drain, all extending parallel to each other in a first direction; at least one source electrostatic discharge (ESD) protection circuit; a source terminal disposed above and in electrical contact with the at least one source ESD protection circuit, wherein the source terminal extends in the first direction; at least one drain ESD protection circuit; and a drain terminal disposed above and in electrical contact with the at least one drain ESD protection circuit, wherein the drain terminal extends in the first direction.
