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信号処理回路およびカプセル内視鏡
专利权人:
オリンパス株式会社
发明人:
大澤 雅人
申请号:
JP2013101378
公开号:
JP6132655B2
申请日:
2013.05.13
申请国别(地区):
JP
年份:
2017
代理人:
摘要:
PROBLEM TO BE SOLVED: To reduce power consumption of a driver circuit.SOLUTION: A signal array generation circuit SIG_ARY_GEN time-divides a plurality of voltage signals and outputs them as a first signal train sequentially, and outputs the plurality of voltage signals as a second signal train in parallel at the same time. A maximum value/minimum value detection circuit MAX_MIN_DETECT outputs a maximum signal corresponding to the approximate maximum of the plurality of the voltage signals and a minimum signal corresponding to the approximate minimum of the plurality of the voltage signals. A bias control circuit BIAS_GEN outputs a bias control signal which changes according to the difference between the maximum signal and the minimum signal. A driver circuit DRV_CIR receives the first signal train and the bias control signal and outputs a driver output voltage obtained by converting the first signal train with transconductance according to the bias control signal. A sample-and-hold circuit SHC repeats an operation of sampling the driver output voltage in a sample period and an operation of holding the driver output voltage in a holding period.
来源网站:
中国工程科技知识中心
来源网址:
http://www.ckcest.cn/home/

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