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READOUT ELECTRONICS ARCHITECTURE WITH IMPROVED TIMING RESOLUTION
专利权人:
General Electric Company
发明人:
Changlyong Kim,Albert Taesung Byun
申请号:
US15630334
公开号:
US20180372822A1
申请日:
2017.06.22
申请国别(地区):
US
年份:
2018
代理人:
摘要:
A multichannel ASIC for interfacing with an array of photodetectors in a PET imaging system includes a front-end circuit configured to be coupled to the array of photodetectors and to receive analog signals therefrom. The ASIC includes a time discriminating circuit including a low input impedance amplifier configured to be coupled to the array of photodetectors and to receive a signal summing the analog signals from the array of photodetectors and to generate a hit signal for timing pickoff based on the signal. The ASIC includes an energy circuit operably coupled to the front-end circuit and configured to generate a summed energy output signal based on each of the analog signals and summed positional output signal based on each of the analog signals.
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中国工程科技知识中心
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http://www.ckcest.cn/home/

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