A sample clock generator includes a first optical path and a second optical path through which input lights are guided, an optical phase shifter to shift a phase of the input light guided through the first optical path, an interference-light generating unit to combine a phase-shifted input light and the input light guided through the second optical path to thereby generate an interference light for sample clock, a splitting unit to split the interference light for sample clock into two split lights having different phases, one light receiving unit to at least receive one split light from among the two split lights having different phases, the other light receiving unit to at least receive the other split light, a signal generating unit to generate a sample clock signal based on signals outputted from the one light receiving unit and the other light receiving unit.
