ＰＣＩｅリンク故障を処理する方法、装置及びシステム

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专利权人:

華為技術有限公司ＨＵＡＷＥＩ ＴＥＣＨＮＯＬＯＧＩＥＳ ＣＯ．，ＬＴＤ．

发明人:

杜 ▲閣▼

申请号：

JP20160510920

公开号：

JP6110560(B2)

申请日:

2014.04.02

申请国别(地区):

日本

年份:

2017

代理人:

摘要：

The present invention discloses a method, device, and system for processing a PCIe link fault. When detecting that a fault occurs in a lane of a link between a PCIe apparatus and a downstream PCIe apparatus, the PCIe apparatus sends an MSI message to a CPU, and negotiates a current lane width value with the downstream PCIe apparatus; the CPU acquires a lane negotiation capability value M and the current lane width value M of the PCIe apparatus from the PCIe apparatus according to the MSI message, and compares N and M/2; when N

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