The present invention discloses a method, device, and system for processing a PCIe link fault. When detecting that a fault occurs in a lane of a link between a PCIe apparatus and a downstream PCIe apparatus, the PCIe apparatus sends an MSI message to a CPU, and negotiates a current lane width value with the downstream PCIe apparatus; the CPU acquires a lane negotiation capability value M and the current lane width value M of the PCIe apparatus from the PCIe apparatus according to the MSI message, and compares N and M/2; when N