An endoscope system 1 includes an endoscope 2 including a CCD 15 for generating an image pickup signal, and a processor 3 including a video processing circuit 22 for performing signal processing on the image pickup signal to be inputted. The processor 3 includes: a VCXO 30 that generates a reference clock signal as a reference of a sampling pulse for sampling the image pickup signal； a PLL circuit 27 that synchronizes a phase of the image pickup signal to be inputted and a phase of the reference clock signal； a synchronization detection circuit 32 that detects whether the phase of the image pickup signal and the phase of the reference clock signal are synchronized with each other； and a multiplexer 21 that controls the video processing circuit 22, on the basis of the detection result by the synchronization detection circuit 32, to output a predetermined video when it is detected that the phase of the image pickup signal and the phase of the reference clock signal are not synchronized with each other.
