An endoscope 2 connectable to a video processor 3 including a clock A generation circuit 31 and a vertical synchronizing signal A generation portion 32, and includes: a clock C generation circuit 23 configured to generate a clock C set asynchronously with a clock A； a reception circuit 25 configured to receive a vertical synchronizing signal A and also generates a vertical synchronizing signal C that attains gentle synchronization at a frame rate； and a synchronization control signal generation circuit 24 configured to generate a sensor synchronization control signal that controls a CMOS sensor 21 according to the vertical synchronizing signal C.
