The present invention comprises: an acquisition unit (21) that acquires a calling order (31) for functions; a virtual cache memory generation unit that generates a virtual cache memory having storage areas corresponding to the number of ways for cache memory; a simulator unit that performs a simulation calling an instruction code included in each of a plurality of functions on the calling order (31) as a call instruction code with respect to the virtual cache memory and that, in cases where conflict arises, acquires information concerning the conflict as conflict information (70); and an arrangement position determination unit (80) that determines an arrangement position of functions in the cache memory on the basis of the conflict information 70.
