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VERTICAL POWER TRANSISTOR WITH THIN BOTTOM EMITTER LAYER AND DOPANTS IMPLANTED IN TRENCHES IN SHIELD AREA AND TERMINATION RINGS
专利权人:
MaxPower Semiconductor, Inc.
发明人:
Yilmaz Hamza
申请号:
US201615259877
公开号:
US2017110535(A1)
申请日:
2016.09.08
申请国别(地区):
美国
年份:
2017
代理人:
摘要:
Various improvements in vertical transistors, such as IGBTs, are disclosed. The improvements include forming periodic highly-doped p-type emitter dots in the top surface region of a growth substrate, followed by growing the various transistor layers, followed by grounding down the bottom surface of the substrate, followed by a wet etch of the bottom surface to expose the heavily doped p+ layer. A metal contact is then formed over the p+ layer. In another improvement, edge termination structures utilize p-dopants implanted in trenches to create deep p-regions for shaping the electric field, and shallow p-regions between the trenches for rapidly removing holes after turn-off. In another improvement, a dual buffer layer using an n-layer and distributed n+ regions improves breakdown voltage and saturation voltage. In another improvement, p-zones of different concentrations in a termination structure are formed by varying pitches of trenches. In another improvement, beveled saw streets increase breakdown voltage.
来源网站:
中国工程科技知识中心
来源网址:
http://www.ckcest.cn/home/

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