A video processor includes: a judgement section (12) configured to judge whether an input image signal is a 2D or 3D image signal an LR synthesis section (15) configured to synthesize left and right image signals to output a synthetic image signal if the judgement section (12) judges that the input image signal is the 3D image signal and configured to embed the 2D image signal into one of the left and right image signals to output a synthetic image signal if the judgement section (12) judges that the input image signal is the 2D image signal and an image processing section (16) configured to apply image processing to the synthetic image signal at an image processing clock twice or more than twice as much as a clock of the 3D image signal.